1. Field of the Invention
This invention relates to a manufacturing method of a semiconductor device, particularly to a manufacturing method of the semiconductor device having a MOS transistor and a diffused resistor formed on a same semiconductor substrate.
2. Description of the Related Art
Bipolar ICs are a type of a semiconductor device used for a circuit of a receiver such as a television. The bipolar IC is a semiconductor device having a MOS transistor having a sidewall spacer formed on a sidewall of a gate electrode and a diffusion resistance layer formed by doping an impurity of low concentration on the same semiconductor substrate together with the bipolar transistor which is drivable with a large current. The diffusion resistance layer is used, for example, for generating a voltage drop necessary in the circuit.
Next, a manufacturing method of a semiconductor device of the related art applicable to the above bipolar IC will be described with reference to drawings. FIGS. 8 to 12 show the manufacturing method of the semiconductor device of the related art. FIGS. 8 to 12 show a cross-sectional view of a region formed with a MOS transistor 20 and a diffusion resistance layer 30 that is part of an electronic device including a bipolar transistor (not shown) formed on the same p-type semiconductor substrate 10.
First, as shown in FIG. 8, an n-type well 11 is formed on the p-type semiconductor substrate 10. In this n-type well 11, element separation layers 12 are formed around the region to be formed with the diffusion resistance layer 30 by a LOCOS (local oxidation of silicon) method. Then, a gate insulation film 21 (e.g. made of a silicon oxide film) is formed on the whole surface of the n-type well 11 except on the element separation layers 12.
Next, as shown in FIG. 9, a gate electrode 22 is formed on a part of the gate insulation film 21 in the position adjacent the region to be formed with the diffusion resistance layer 30. Then, a photoresist layer 40 having an opening 40 m above the region to be formed with the diffusion resistance layer 30 is formed by exposure and development with a mask (not shown). By using this photoresist layer 40 as a mask, a p-type impurity (e.g. boron) of low concentration is doped in the n-type well 11 to form a p−-type diffusion layer.
Next, as shown in FIG. 10, after the photoresist layer 40 is removed, a CVD insulation film 23 (e.g. made of a silicon oxide film) is formed on the whole surface by a CVD method.
Then, as shown in FIG. 11, an anisotropic etching is performed to the CVD insulation film 23 to form a sidewall spacer 23s on a sidewall of the gate electrode 22.
Then, as shown in FIG. 12, a p-type impurity of high concentration is selectively doped by using a mask (not shown) to form a source layer 24s and a drain layer 24d of the MOS transistor 20 and a contact forming p+-type layer 31 for forming a contact of the diffusion resistance layer 30. The MOS transistor 20 and the diffusion resistance layer 30 are thus formed on the same p-type semiconductor substrate 10 by the manufacturing method described above. The related technology is disclosed in Japanese Patent No. 3143366.
However, in the manufacturing method of the semiconductor device of the related art, in the step of forming the sidewall spacer 23s by performing the anisotropic etching to the CVD insulation film 23, damages such as a crystal defect occur at the surface of the diffusion resistance layer 30 by over-etching. This generates property variation in the diffusion resistance layer 30, thereby degrading operation characteristics of the diffusion resistance layer 30.
That is, when the damages occur in the diffusion resistance layer 30, particularly, in a region around a border with the element separation layers 12, by over-etching, there arises a problem of generating many leak paths leaking a leak current to the n-type well 11 (shown by an arrow in FIG. 12). Particularly, when a bipolar transistor (not shown) formed on the same p-type semiconductor substrate 10 is driven for a long time, high Joule heat is generated and the diffusion resistance layer 30 formed on the same p-type semiconductor substrate 10 is overheated, thereby increasing a leak current more. This results in a problem of degrading the operation characteristics of the semiconductor device.